To connect the miniature world of integrated circuits such as a CPU with the outside world, a number of physical connections must be made. Although this may seem simple, these I/O paths are an important risk for the functioning and integrity of the chip, in the form of electrostatic discharge (ESD), a type of short circuit called a locking up and metastability by factors such as noise. Protecting the delicate Asic of the cruel outside world is the task of the I/O circuit, with [Ken Shirriff] Recently an in -depth view of this circuit in Intel’s 386 CPU.
The 386 has a total of 141 of these I/O -Pads, each connected to a pen on the package with a delicate gold binding wire. ESD is at the top of the list of potential risks, because a wave of high voltage can literally blow a hole in the circuit. The protective circuit for this can be seen in the above mold shot, with its sticks, high -restricting resistance and a third diode.
Pick up Is the second major problem, caused by the unintended creation of parasitic structures under the P and NMOS transistors. These parasitic transistors are normally inactive, but if they are activated, they can cause a confinement that causes temporary failure, but the worst case melts part of the chip due to high streams.
To prevent I/O paths from causing the setup, the 386 ‘security rings’ implements that must block unwanted current. Finally, there is metastability, which suggests the name is not necessarily harmful, but the effect of the chip can seriously mess that beautiful binary signals expects. On the 386, two Flip-Flops per i/O path are used to solve this mainly.
Although the circuit of the 386 from 1985 era according to today’s standards was very chonky, it was still not a party for these external influences, making it clear how important these protective measures are for today’s ASICs with much smaller function sizes.
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