Analyst Ming-Chi Kuo has repeated other reports that Apple is expected to use a new chip packing technology in the A20 chip, which will debut in the iPhone 18 next year. His report focuses on suppliers for chip packaging material, rather than the benefits of the new process. A few months ago we heard the same thing from analyst Jeff PU.
When you buy an iPhone 16 today, the A19 chip is a fairly large and complex monolithic ‘system on a chip’. It has the CPU, GPU, Neural Engine, Video and Audio Coders and Decoders, and a couple of other small things all on one large complex piece of silicon with around 30 billion transistors. Many chips are made on a large silicon disc (called a wafer) and then packaged and cut in individual A19 chips, called “Dies”.
But the ram is not on the same piece of silicon. RAM is usually produced using different silicon processes, on various large waffles, cut into their own molds. The ram is then combined with the large socly by connecting the two with the help of another piece of silicon, called an interposer.
This is done because the production processes that SRAM produces efficiently is different from what the logic produces efficiently. But with a new TSMC technology called “Wafer-level multi-chip module (WMCM) packaging”, all of which can change.
This process will make it possible for Apple to build a large monolithic chip inclusive The ram on the same dice as the CPU, GPU, neural engine, media encoders, and so on. If the current rumors are correct, this would be 12 GB RAM, but the process does not require a specific amount. Rumors indicate the iPhone 18 as the first device to use the new chip, and the iPhone fold can also be a candidate.
On-Die RAM can simplify the production process, which means that fewer steps are needed than the current setting of the RAM-on-interposer. But the advantage for users is the potential to have very wide and fast RAM interfaces, making access to RAM almost as fast as a high-level SRAM cache. This can drastically improve performance in situations that are limited by memory band width, such as powerful 3D images or certain AI applications.
It can also make it possible to make energy management possible, so that the SOC can use less electricity with integrated RAM than the current setup with RAM that is linked to an interposer. This can improve the battery life, but the battery life is a factor of many different components such as the display, wireless radios, storage and more.
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